The present invention relates to a semiconductor device and is a technology applicable, for example, to a semiconductor device in which two semiconductor chips are layered.
Among the semiconductor devices, there is a device in which two semiconductor chips of a first semiconductor chip and a second semiconductor chip are layered with element formation planes thereof made to face mutually (for example, Japanese Unexamined Patent Application Publication No. 2011-54800). A technology described in Japanese Unexamined Patent Application Publication No. 2011-54800 is one that makes the first semiconductor chip and the second semiconductor chip transmit and receive a signal therebetween. Specifically, an inductor is formed in each of the first semiconductor chip and the second semiconductor chip, and these inductors are faced mutually. Then, transmission and reception of the signal is performed between the first semiconductor chip and the second semiconductor chip by transmitting and receiving the signal between these inductors.
Moreover, Japanese Unexamined Patent Application Publication No. 2011-54800 describes a semiconductor device in which the first semiconductor chip is mounted over an element mounting part of a lead frame, and further the second semiconductor chip is mounted over this first semiconductor chip. In this semiconductor device, a part of an element formation plane of the second semiconductor chip protrudes from the first semiconductor chip. Then, the second semiconductor chip and a lead terminal are coupled by using a bonding wire.